TCD30xx Detailed Documentation

TCD30xx is a powerful CMOS based Audio Controller with an on-board ARMTM processor. It is the flagship in TC Applied Technologies’ DICE IIITM series of integrated circuits, supporting all current and emerging interfaces for audio networking and computer recording including USB, Firewire and Ethernet AVB. 

TCD30xx is designed for everything from simple AVB endpoints to complex recording interfaces and digital mixing consoles.

Ethernet AVB, FireWire and USB audio channels can be routed to and from industry standard digital audio formats using TCD30xx’s on-board ADAT and AES/SPDIF transceivers, and to and from various DACs, ADCs and DSPs using its fully configurable InS/TDM interface.

With its high level of integration, patented JetPLLTM technology, and support of USB, Firewire and Ethernet, TCD30xx provides the versatility necessary for the professional and Music Industry (MI) audio markets.

The DICETM Broadband Streaming Engine handles all aspects of moving data in hardware, resulting in zero realtime load on the host processor.

DICE III Block Diagram

 

Memory Buses

The core modules in the TCD30xx family are connected via a 50 MHz AHB bus and a 100 MHz APB bus.

Some memory transactions can occur simultaneously. Where there may be contentions, the memory requests are queued by the Interconnect Matrix.

The Multi-Port Memory Controller, and USB2, I2C, SPI and UART peripherals may be accessed from the DMA controller.

The ARM CPU, USB2 Controller, DMA Controller, and the AHB-APB bridge can be memory bus masters.

 DICE III Memory Block Diagram

 

Memory Map

This diagram shows how the various modules in the system are addressed from the on-chip ARM processor. The Boot ROM/Internal SRAM area is located at address zero. When Remap is low, the Boot ROM is presented at address zero, when Remap is high, the internal SRAM is presented at address zero.

The SDRAM segment is only present on the TCD3070 variant.

From the DMA controller point-of-view, the SDRAM base address differs from the addresses used by the CPU. See the Memory Map document below for details.

The memory segments, Interrupt assignments, DMA assigments, and other modules are described in the documents listed in the table below.

 

 

User Guide

Module/Memory RangeRelated DocumentRevision
Memory Map, Interrupt Map, DMA Map DICE_III_User_Guide_MemoryMap.pdf 1.0.0-41569, July 5, 2015
Embedded ARM926 EJS CPU 2 ARM926 EJS  
SYS_CTRL - System Control (Power Management) and Aport MUX DICE_III_User_Guide_SysCtrl.pdf 1.0.0-41560, June 27, 2015
Interrupt Controller DICE_III_User_Guide_InterruptController.pdf 0.9.0-41360, May 6, 2015
MPMC - Multiport Memory Contoller  
DMAC - DMA Controller DICE_III_User_Guide_DMA.pdf 1.0.0-41621, September 11, 2015
SDIO - SD Card interface  
Watchdog DICE_III_User_Guide_Watchdog.pdf 0.9.0-41360, May 6, 2015
GPIO - General Purpose IO DICE_III_User_Guide_GPIO.pdf 0.9.0-41360, May 6, 2015
Remap/Pause 10 DICE_III_User_Guide_RemapPause.pdf 0.9.0-41360, May 6, 2015
Timers 11 DICE_III_User_Guide_Timers.pdf 0.9.0-41360, May 6, 2015
I2C - Inter IC Communications 12 DICE_III_User_Guide_I2C.pdf 0.9.0-41360, May 6, 2015
SPI - Serial Parallel Interface 13 DICE_III_User_Guide_SPI.pdf 0.9.0-41360, May 6, 2015
UART 14 DICE_III_User_Guide_UART.pdf 0.9.0-41360, May 6, 2015
USB_CTL - USB Control Registers 15   
ETH_MAC - Ethernet MAC with Timestamp Extension 16 DICE_III_User_Guide_ETH.pdf 1.0.0-41582, July 17, 2015
1394 LLC - IEEE1394 Link Layer Controller 17 DICE_III_User_Guide_1394LLC.pdf 0.9.0-41360, May 6, 2015
Clock Controller 18 DICE_III_User_Guide_ClockController.pdf 0.9.0-41360, May 6, 2015
Router - Audio Router, peak dectector 19 DICE_III_User_Guide_Router.pdf 0.9.0-41360, May 6, 2015
JetPLL 20 DICE_III_User_Guide_JetPLL.pdf 0.9.0-41360, May 6, 2015
InS 21 DICE_III_User_Guide_InS.pdf 0.9.0-41360, May 6, 2015
AES Rx/Tx 22 DICE_III_User_Guide_AES.pdf 0.9.0-41360, May 6, 2015
ADAT Rx/TX 23 DICE_III_User_Guide_ADAT.pdf 0.9.0-41360, May 6, 2015
USB Audio - USB Streaming Control 24 DICE_III_User_Guide_USB_Audio.pdf 0.9.0-41360, May 6, 2015
AVB Audio - AVB Streaming Control 25   
1394 Audio (AVS) - IEEE1394 Streaming Control 26   
Mixer 27 DICE_III_User_Guide_Mixer.pdf 0.9.0-41360, May 6, 2015
AIO - CPU Audio Interface 28 DICE_III_User_Guide_AIO.pdf 0.9.0-41360, May 6, 2015
PWM - Pulse Width Modulation 29 DICE_III_User_Guide_PWM.pdf 0.9.0-41360, May 6, 2015
floatfix - Floating/Fixed-point conversion 30 DICE_III_User_Guide_FloatFix.pdf 0.9.0-41360, May 6, 2015
ADC - Analog to Digital Converter 31 DICE_III_User_Guide_ADC.pdf 1.0.0-41542, June 15, 2015